From 27ed30ed8368075872734d3019cecd0f82989405 Mon Sep 17 00:00:00 2001
From: Paul Dechamps <paul.dechamps@uliege.be>
Date: Tue, 7 May 2024 17:49:08 +0200
Subject: [PATCH] (chore) Update dart commit

---
 blast/interfaces/dart/DartInterface.py | 6 +++---
 modules/dartflo                        | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/blast/interfaces/dart/DartInterface.py b/blast/interfaces/dart/DartInterface.py
index c505ec0..09e06be 100644
--- a/blast/interfaces/dart/DartInterface.py
+++ b/blast/interfaces/dart/DartInterface.py
@@ -27,8 +27,8 @@ from blast.interfaces.DSolversInterface import SolversInterface
 class DartInterface(SolversInterface):
     def __init__(self, dartCfg, vSolver, _cfg):
         try:
-            from modules.dartflo.dart.api.core import initDart
-            self.inviscidObjects = initDart(dartCfg, task=dartCfg['task'], viscous=True)
+            from modules.dartflo.dart.api.core import init_dart
+            self.inviscidObjects = init_dart(dartCfg, task=dartCfg['task'], viscous=True)
             self.solver = self.inviscidObjects.get('sol') # Solver
             self.blw = [self.inviscidObjects.get('blwb'), self.inviscidObjects.get('blww')]
             if dartCfg['task'] == 'optimization':
@@ -91,7 +91,7 @@ class DartInterface(SolversInterface):
                 import modules.dartflo.dart.utils as invUtils
                 if self.cfg['Format'] == 'vtk':
                     print('Saving Cp files in vtk format. Msh {:s}, Tag {:.0f}'.format(self.inviscidObjects['msh'].name, self.cfg['saveTag']))
-                    invUtils.writeSlices(self.inviscidObjects['msh'].name, self.cfg['writeSections'], self.cfg['saveTag'], sfx=sfx)
+                    invUtils.write_slices(self.inviscidObjects['msh'].name, self.cfg['writeSections'], self.cfg['saveTag'], sfx=sfx)
     
     def save(self, sfx='inviscid'):
         self.solver.save(self.inviscidObjects['wrt'], sfx)
diff --git a/modules/dartflo b/modules/dartflo
index 52a4059..7f5cf5c 160000
--- a/modules/dartflo
+++ b/modules/dartflo
@@ -1 +1 @@
-Subproject commit 52a4059c97365dd23e7dba39fb4623623be5769d
+Subproject commit 7f5cf5c5c57d9a90406a8051058e1e0ed9676ee4
-- 
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